31.080 半导体分立器件 标准查询与下载

SJ/T 2658.12-2015 半导体红外发射二极管测量方法 第12部分:峰值发射波长和光谱辐射带宽

本部分规定了半导体红外发射二极管(以下简称器件)峰值发射波长和光谱辐射带宽的测量原理图、测量步骤以及规定条件。 本部分适用于半导体红外发射二极管。

Measuring method for semiconductor infrared-emitting diode.Part 12: Peak-emission wavelength and spectral radiant bandwidth

SJ/T 2658.13-2015 半导体红外发射二极管测量方法 第13部分:辐射功率温度系数

本部分规定了半导体红外发射二极管(以下简称器件)辐射功率温度系数的测量原理图、测量步骤以及规定条件。 本部分适用于半导体红外发射二极管。

Measuring method for semiconductor infrared-emitting diode.Part 13: Temperature coefficient for radiant power

SJ/T 2658.7-2015 半导体红外发射二极管测量方法 第7部分:辐射通量

本部分规定了半导体红外发射二极管(以下简称器件)辐射通量的测量原理图、测量步骤以及规定条件。 本部分适用于半导体红外发射二极管。

Measuring method for semiconductor infrared-emitting diode.Part 7: Radiant flux

GSO IEC 60191-4:2015 半导体器件机械标准化 第4部分：半导体器件封装的封装布局编码和分类系统

This part of IEC 60191 specifies a method for the designation of package outlines and for the classification of forms of package outlines for semiconductor devices and a systematic method for generating universal descriptive designators for semiconductor device packages. The descriptive designator provides a useful communication tool but has no implied control for assuring package interchangeability.

Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages

GSO IEC 60191-5:2015 半导体器件的机械标准化 第5部分：适用于使用卷带自动键合 (TAB) 的集成电路封装的建议

This part of IEC 60191 on mechanical standardization gives recommendations applying to integrated circuits supplied in packages using tape automated bonding (TAB) as the principal component for structural and interconnection functions. This standard is applicable to the finished component supplied by a manufacturer to a user and does not define requirements relating to the IC to tape interface (the inner lead bond or ILB).

Mechanical standardization of semiconductor devices - Part 5: Recommendations applying to integrated circuit packages using tape automated bonding (TAB)

GSO IEC 60748-5:2015 半导体器件 集成电路 第5部分：半定制集成电路

This part of IEC 60748 specifies standards on the subcategories of semicustom integrated circuits that appear in the following classification family tree of ICs. NOTE – This family tree is not exhaustive and may be completed when necessary.

Semiconductor devices - Integrated circuits - Part 5: Semicustom integrated circuits

GSO IEC 60796-1:2015 用于 8 位和 16 位数据的微处理器系统总线 (1MULTIBUS I) 第1部分：带有电气和时序规范的功能描述

This standard is applicable to interface system components, for use in interconnecting data processing, data storage, and peripheral control devices in a closely coupled configuration. This interface system contains the necessary signals to allow the various system components to interact with each other. It allows memory and Input/Output (I/O) data transfers, direct memory accesses, generation of interrupts, etc. This standard provides a detailed description of all the elements and features that make up the system bus. The bus supports two independent address spaces: memory and I/O.During memory cycles the bus allows direct addressability of up to 16 megabytes using 24-bit addressing. During I/O bus cycles, the bus allows addressing of up to 64K I/O ports using 16-bit addressing.Both memory and I/O cycles can support 8-bit data transfers. The bus structure is built upon the master-slave concept where the master device in the system takes control of the bus and the slave device, upon decoding its address, acts upon the command provided by the master. This handshake (master-slave relationship) between the master and slave devices allows modules of different speeds to be interfaced via the bus. It also allows data rates up to five million transfers per second (bytes or words) to take place across the bus. Another important feature of the bus is the ability to connect multiple master modules for multiprocessing configurations. The bus provides control signals for connecting multiple masters in either a serial or parallel priority fashion. With either of these two arrangements,more than one master may share bus resources. This standard has been prepared for those. users who intend to evaluate or design products that will be compatible with the system bus structure. To this end, the necessary signal definitions and timing and electrical specifications have been covered in detail. This standard deals only with the interface characteristics of microcomputer devices and not with design specifications, performance requirements, and safety requirements of modules. Throughout this standard, the term "system" denotes the byte or word interface system that, in general, includes all the circuits,connectors, and control protocol to effect unambiguous data transfer between devices. The term "device" or "module" denotes any product connected to the interface system that communicates information via the bus, and that conforms to the interface system definition.

Microprocessor system bus - 8-bit and 16-bit data (MULTIBUS I) - Part 1: Functional description with electrical and timing specifications

SJ/T 2216-2015 硅光电二极管技术规范

本规范规定了硅光电二极管的光电特性和机械特性以及环境特性的技术要求、检验方法和检验规则等。本规范适用于2CU系列硅光电二极管(以下简称“器件”)。

Technical specification for photodiode of silicon

SJ/T 2214-2015 半导体光电二极管和光电晶体管测试方法

本标准规定了半导体光电二极管和光电晶体管(以下简称“器件”)光电参数的测试方法。本标准适用于半导体光电二极管和光电晶体管光电参数的测试。本标准不适用PIN、雪崩光电二极管的测试。

Measuring methods for semiconductor photodiode and phototransistor

SJ/T 11486-2015 小功率LED芯片技术规范

本规范规定了小功率半导体发光二极管芯片(以下简称芯片)的技术要求、检验方法、检验规则和标志、包装、运输和储存。本规范适用于可见光芯片,紫外发射二极管芯片和红外发射二极管芯片可参照执行。

Technical specification for low power light-emitting diode chips

GSO IEC 60749-24:2014 半导体仪器机械和气候试验方法 第24部分：加速防潮性无偏轮

The unbiased highly accelerated stress testing (HAST) is performed for the purpose of evaluating the reliability of non-hermetically packaged solid-state devices in humid environments. It is a highly accelerated test which employs temperature and humidity under non-condensing conditions to accelerate the penetration of moisture through the external protective material (encapsulant or seal) or along the interface between the external protective material and the metallic conductors which pass through it. Bias is not applied in this test to ensure that the failure mechanisms potentially overshadowed by bias can be uncovered (e.g. galvanic corrosion). This test is used to identify failure mechanisms internal to the package and is destructive. NOTE This test is a complete rewrite of the test contained in Clause 4C of Chapter 3 of IEC 60749 (1996) (without bias voltage).

Semiconductor devices - Mechanical and climatic test methods - Part 24: Accelerated moisture resistance - Unbiased HAST

GSO IEC 60822:2014 VSB IEC 60821 VMEbus 的并行子系统总线

The introduction of high performance of 32-bit microprocessors, as well as the demands placed on microcomputers by the user community have created a need for multiprocessor systems built from board level products. The increase in the number of functions that such systems provided necessitated the introduction of a sophisticated subsystem bus. The VSB (VME Subsystem Bus) was designed to respond to these requirements. It includes a high speed asynchronous data transfer bus which allows masters to direct the transfer of binary data to and from slaves. The master initiates bus cycles in order to transfer data between itself and slaves. The slave detects bus cycles that are initiated by the active master and, when those cycles select it, transfers data between itself and the master. Four types of cycles are defined: an address-only cycle, a single transfer cycle, a block transfer cycle, and an interrupt acknowledge cycle. To maximize data transfer rates in multiprocessor systems, the VSB standard defines a mechanism that allows the master to broadcast the data to any number of slaves in the course of a single cycle. In addition, the data transfer mechanism supports dynamic bus sizing as well as resource locking and data caching. The arbitration bus is the second of the two sub-buses defined in the VSB standard. It allows arbiter modules and/or- requester modules to coordinate the use of the data transfer bus. Two arbitration methods are defined - a serial arbitration method and a parallel (distributed) arbitration method. These arbitration methods provide protocols to implement an array of subsystem architectures. Using the serial arbitration method, a designer can implement a single master subsystem that includes a single processor board requiring access to large amounts of memory. This method could be used to build a system that gives priority to a primary master that, when it can, grants the bus to other secondary masters. At the other end of the spectrum, a multiprocessing subsystem can be implemented using the parallel arbitration method.

VSB - Parallel Sub-system Bus of the IEC 60821 VMEbus

GSO IEC 62373:2014 金属氧化物半导体场效应晶体管 (MOSFET) 的温度偏置稳定性测试

This International Standard provides a test procedure for a bias-temperature (BT) stability test of metal-oxide semiconductor, field-effect transistors (MOSFET).

Bias-temperature stability test for metal-oxide, semiconductor, field-effect transistors (MOSFET)

GSO IEC 60796-2:2014 微处理器系统总线 8 位和 16 位数据 (MULTIBUS I) 第2部分：系统总线配置的机械和引脚描述 带边缘连接器（直接）

This standard is applicable to an interface used to connect microprocessor system components by means of the edge connector (direct) type backplane.

Microprocessor system bus - 8-bit and 16-bit data (MULTIBUS I) - Part 2: Mechanical and pin descriptions for the system BUS configuration, with edge connectors (direct)

GSO IEC 60821:2014 VMEbus 用于 1 字节到 4 字节数据的微处理器系统总线

This standard specifies a high performance backplane bus for use in microcomputer systems that employ single or multiple microprocessors. It is based on the VMEbus specification, released by the VME Manufacturers Group in August of 1982. The bus includes four sub-buses: the Data Transfer Bus, the Priority Interrupt Bus, the Arbitration Bus and the Utility Bus. The Data Transfer Bus supports 8-, 16- and 32-bits transfers over a non-multiplexed 32-bit data and address highway. The transfer protocols are asynchronous and fully handshaken. The Priority Interrupt Bus provides real-time interrupt services to the system. The allocation of bus mastership is performed by the Arbitration Bus, which allows to implement both Round Robin and Prioritized arbitration algorithms. The Utility bus provides the system with power-up and power-down synchronization. The mechanical specifications of boards, backplanes, subracks and enclosures are based on IEC Publication 297.

VMEbus - Microprocessor system bus for 1 byte to 4 byte data

GSO IEC 60134:2014 管道、电子阀门和类似半导体配件的评级系统

This recommendation applies to rating systems in use for electronic tubes and valves and semiconductor devices.

Rating systems for electronic tubes and valves and analogous semiconductor devices

GSO IEC 60749-33:2014 半导体器件 机械和气候测试方法 第33部分：耐加速潮湿 用于灭菌的无偏金属容器

The unbiased autoclave test is performed to evaluate the moisture resistance integrity of nonhermetic packaged solid-state devices using moisture condensing or moisture saturated steam environments. It is a highly accelerated test which employs conditions of pressure, humidity and temperature under condensing conditions to accelerate moisture penetration through the external protective material (encapsulant or seal) or along the interface between the external protective material and the metallic conductors passing through it. This test is used to identify failure mechanisms internal to the package and is destructive.

Semiconductor devices - Mechanical and climatic test methods - Part 33: Accelerated moisture resistance - Unbiased autoclave

GSO IEC 62374:2014 半导体器件 栅极电介质薄层的瞬态电介质击穿 (TDDB) 测试

This International Standard provides a test method of Time Dependent Dielectric Breakdown (TDDB) for gate dielectric films on semiconductor devices and a product lifetime estimation method of TDDB failure.

Semiconductor devices - Time dependent dielectric breakdown (TDDB) test for gate dielectric films

GSO IEC 60747-1:2014 半导体器件 第1部分：概述

This part of IEC 60747 gives the general requirements applicable to the discrete semiconductor devices and integrated circuits covered by the other parts of IEC 60747 and IEC 60748 (see Annex A).

Semiconductor devices - Part 1: General

SJ/T 2217-2014 硅光电晶体管技术规范

本规范规定了硅光电晶体管(以下简称“器件”)光电特性、机械特性和环境性能的技术要求、检验方法和检验规则。本规范适用于3DU系列硅光电晶体管。

Technical specification for phototransistor of silicon