JEDEC JESD82-26.01-2023
针对 2R x 4 DDR2 RDIMM 应用的具有奇偶校验的 SSTUB32868 注册缓冲区的定义

DEFINITION OF THE SSTUB32868 REGISTERED BUFFER WITH PARITY FOR 2R x 4 DDR2 RDIMM APPLICATIONS

标准号

JEDEC JESD82-26.01-2023

发布

2023年

发布单位

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适用范围

This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTUB32868 registered buffer with parity test for DDR2 RDIMM applications. The purpose is to provide a standard for the SSTUB32868 (see Note) logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

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