This standard specifies a high performance backplane bus for use in microcomputer systems that employ single or multiple microprocessors. It is based on the VMEbus specification, released by the VME Manufacturers Group in August of 1982. The bus includes four sub-buses: the Data Transfer Bus, the Priority Interrupt Bus, the Arbitration Bus and the Utility Bus. The Data Transfer Bus supports 8-, 16- and 32-bits transfers over a non-multiplexed 32-bit data and address highway. The transfer protocols are asynchronous and fully handshaken. The Priority Interrupt Bus provides real-time interrupt services to the system. The allocation of bus mastership is performed by the Arbitration Bus, which allows to implement both Round Robin and Prioritized arbitration algorithms. The Utility bus provides the system with power-up and power-down synchronization. The mechanical specifications of boards, backplanes, subracks and enclosures are based on IEC Publication 297.