For those high pin count components (e.g.@ ball grid array) that interconnect different power leads through common@ low-resistance power and ground planes in the package@ the number of power and ground leads can be reduced by ganging or grouping supply pins together on a custom test fixture board. A minimum number of power supply pins (i.e.@ power or ground) should be ganged to bring the total number of tester channels used equal to the number of tester channels available on the tester. NOTE: ANSI/ESD SP5.2.1 does not cover the testing of the signal pins of high pin count devices. It is recommended to use ANSI/ESD SP5.2.2. Purpose This standard practice establishes an alternative test method to perform Machine Model (MM) component level electrostatic discharge (ESD) tests when the component or device pin count exceeds the ESD simulator tester channels. This alternative test method (Supply Pin Ganging) is limited to components with greater than 512 pins or balls. Since many of the tester parasitic properties of a higher pin count ESD simulator cannot be reproduced using a low pin count ESD simulator@ the test results will be similar@ but not identical. This document references ANSI/ESD STM5.2 (MM) test method which will override this standard practice (ANSI/ESD SP5.2.1) if there are any conflicts in testing a component. If an ESD simulator above 512 pins is not available@ then this standard practice can be used as a guide to ESD stress components with greater than 512 pins or balls using a lower pin count ESD simulator.