PURPOSE The purpose of this document is to provide a guideline for both EDA industry and ESD design community to establish a comprehensive ESD electronic design automation (EDA) verification flow satisfying the ESD design challenges of modern ICs. This includes the definition of a common terminology and the description of the required check types. The document is also aimed to convey the basic ESD concepts and their implementation during the IC design process to EDA industry. The document is not limited to specific ESD concepts or EDA solutions of specific vendors@ but covers in a generic way typical checks which require a certain EDA tool set and database. Once these tools are available it is the responsibility of an IC design company@ integrated device manufacturer (IDM) or foundry to implement the specific rules as part of their particular design and verification flows.