The test methods described are intended to be used to discover subassembly failures that result from destructive ESD@ as well as those failures that may result from modi?cation of data stored in subassemblies [e.g.@ in nonvolatile memory elements such as electronically erasable programmable read-only memory (EEPROM) or battery supported random access memory (RAM)]. This guide does not specify ESD tests to characterize the withstand capability of subassemblies that are incomplete (e.g.@ in the process of being manufactured)@ nor the expected ESD immunity of externally powered and/or installed subassemblies. Also@ this guide does not specify tests for completed equipment or systems@ whether powered or not@ nor does it specify ESD tests for individual electronic components@ such as integrated circuits. Such ESD tests are covered in other standards (see IEC Pub 801-2 (1991)@ [B1]@ 1 [B2]@ and [B4]).