This standard specifies the environmental conditions necessary for determining the junction-to-board
thermal resistance, Rejo, and defines this term. The bJBthen nal resistance is a figure of merit for
comparing the thermal performance of surface mount packages mounted on a standard board. This
specification should be used in conjunction with the overview document JESD5 1, “Methodology for the
Thermal Measurement of Component Packages (Single Semiconductor Device)” [i] and the electrical
test procedures described in EINJESDS 1- 1, “Integrated Circuit Thermal Measurement Method (Single
Semiconductor Device)“ [2]. The environmental conditions described in this document are specifically
designed for testing of integrated circuit devices that are mounted on standard test boards with two
internal copper planes [3]. This standard is not applicable to packages that have asymmetric heat flow
paÍhs io the printed circuit board causeá by such thermai enhancements as fused ieacis (ieads connecteci
to the die pad) or power style packages with the exposed heat slug on one side of the package.