The objective of this Technical Report (TR) ICEM (Integrated Circuit Electrical Model) for Components is to propose electrical modelling for integrated circuit internal activities. This model will be used to evaluate electromagnetic behaviour and performances of electronic equipment. 1 General Integrated circuits integrate more and more gates on silicon and the technologies are faster and faster. To predict the electromagnetic behaviour of equipment, it is required to model IC interface switching and their internal activities as well. Indeed IBIS and IMIC models are focused mainly on interface activity predictions (cross-talk, overshoot, etc.). See IEC 62014-1. This report describes a model for EMI simulation due to IC internal activities. This model gives more accurately the electromagnetic emissions of electronic equipment by taking into account the influence of internal activities. This model gives general data which could be implemented in different format such as IBIS, IMIC, SPICE, etc. During the design stage of the application that will exploit the IC, it becomes useful to predict and to prevent electromagnetic risks with the CAD tool. Accurate IC modelling is necessary to run on these simulation tools. Three coupling mechanisms of the internal activities for emission (Figure 1) are proposed in the ICEM model: · conducted emissions through supply lines; · conducted emissions through input/output lines; · direct radiated emissions. This report proposes a model that addresses those three types of coupling in a single approach. The elements of the model would be kept as simple as possible to ease the identification and simulation process. 2 Philosophy The purpose of this report is to provide data to enable printed-circuit-board level (PCB) electromagnetic tools to compute the electromagnetic fields produced by integrated circuits and their associated PCB. These data can be extracted from measurement methods, as described in IEC 61967, or obtained from IC simulation tools. 2.1 Origin of parasitic emission The origin of parasitic emission in IC is due to the current flowing through all the IC gates (Iv and Iv ) during high to low or low to high transitions as shown in Figure 2. The combination of several hundred thousands of gates lead to very important peaks of current, mainly at rise and fall edges of the clock circuit. For example Figure 3 plots the number of gates switching versus the time for an IC integrating 1 000 000 transistors. Consequently, high current spikes are created inside the die and induce voltage drops of the internal voltage references. 2.2 Conducted emission through power-supply lines The current spikes created inside the die are partially reduced thanks to the on-chip decoupling capacitance. Anyhow, a significant portion of the current spikes is present at the power-supply pins of the chip. This current could be measured according to IEC 61967 or other methods permitting to have the power-supply currents. 2.3 Conducted emissions through input/output lines (I/O) The internal voltage drops generated by the current spikes create noise on the I/Os through direct connection, parasitic capacitive and inductive couplings and/or through common impedance. The PCB wires connected to the I/O can act as antennas and propagate electromagnetic emissions. The measurement set-up is done according to IEC 61967. 2.4 Direct radiated emissions The internal current flowing in low impedance loops generates electromagnetic fields which can be measured in near field according to IEC 61967.
IEC/TR 62014-3-2002由国际电工委员会 IX-IEC 发布于 2002-12。
IEC/TR 62014-3-2002 在中国标准分类中归属于: L77 软件工程，在国际标准分类中归属于: 35.240.50 信息技术在工业中的应用,31.200 集成电路、微电子学,25.040.01 工业自动化系统综合。
* 在 IEC/TR 62014-3-2002 发布之后有更新，请注意新发布标准的变化。
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