L62 计算机设备 标准查询与下载

DLA SMD-5962-95837-1995 3.3伏特,32-BIT精简指令集计算机微处理器硅单片电路线型微电路

This drawing forms a part of a one part -one part number documentation system (see 6.6 herein). Three product assurance classes consisting of space application (device class V), military high reliability (device classes

MICROCIRCUIT, DIGITAL, 32-BIT RISC MICROPROCESSOR, 3.3 V, JTAG, MONOLITHIC SILICON

IEEE 896.4A-1995 未来总线一致性试验要求.错误、修正和澄清

Conformance test requirements for Futurebus+; errata, corrections, and clarifications

ARMY MIL-C-48457 B NOTICE 2-1995 11732500:炮兵计算机的操控

This notice should be filed in front of MIL-C-48457B(AR),da ted 30 June 1981

CONTROL, GUNNER'S COMPUTER: 11732500

ANSI/VITA 3-1995 VME总线用板式台面活动插接件

Advances in technology allow smaller board sizes to perform the functionality that a few years ago required a larger board. Alternatively, these advances allow increased functionality on the same sized boards. Thus, VMEbus boards and system designs are greatly increasing in capability. Where once a radio room had six separate chassis containing one radio each, that radio room today has one chassis housing six radios. This size reduction has created the demand for highly reliable and easily maintainable systems. The Telecommunications and Defense applications require a more fault tolerant, live insertable VMEbus. Currently, live insertion and extraction is not supported by the IEEE 1014 VMEbus standard. The VMEbus and Futurebus+ Extended Architectures International Trade Association (VITA) has responded by forming the Recommended Practices Guide to Board Level Live Insertion for the VMEbus Working Group to examine solutions for a Board Level Live Insertable VMEbus. This document recommends practices to implement board level live insertion with existing VMEbus boards.

Board Level Live Insertion for VMEbus

DLA SMD-5962-95570 REV B-1995 32-BIT植入的精简指令集计算机互补金属氧化物半导体硅单片电路线型微电路

Notice of Revision (NOR) 5962-R203-95 for Standard Microcircuit Drawing (SMD) 5962-95570.

MICROCIRCUIT, DIGITAL, CMOS, 32-BIT EMBEDDED MICROPROCESSOR, MONOLITHIC SILICON

ITU-T Q.1210 SPANISH-1995 Q.1210系列智能网络推荐结构

Q.1210-SERIES INTELLIGENT NETWORK RECOMMENDATION STRUCTURE

IEEE 1212-1994 信息技术.微处理系统.控制与状态寄存器(CSR).微机总线结构

Information technology - Microprocessor systems - Control and Status Registers (CSR) Architecture for microcomputer buses

ISO/IEC 13213:1994 信息技术.微处理机系统.微处理机总线的控制和状态登记(CSR)体系结构

Defines the address-space maps, the bus transaction sets, and the node's CSRs. Includes the format and content of the configuration ROM on the node providing the parameters necessary to autoconfigure systems with nonprocessor nodes provided by multiple vendors. The annexes provide background for understanding the usage of this CSR Archtecture specification.

Information technology - Microprocessor systems - Control and Status Registers (CSR) architecture for microcomputer buses

DIN EN 60821:1994 IEC-821-VME总线.1比特至4比特数据用微处理机系统总线.

This document specifies a high performance backplane bus for use in microcomputer systems that employ single or multiple microprocessors. The bus supports 4 sub-buses: Data Transfer Bus, Priority Interrupt Bus, Arbitration Bus and Utility Bus. Data transfer is supported for 8-, 16- and 32-bits data using asynchronous and fully handshaken protocols.#,,#

IEC-821-VMEbus - Microprocessor system bus for 1 byte to 4 byte data (IEC 60821:1991, modified); German version EN 60821:1994

SJ/T 10529-1994 电子收款机通用技术条件

本标准规定了电子收款机的产品分类、技术要求、试验方法、检验规则，以及标志、包装、运输、贮存等内容。 本标准适用于电子收款机。

Generic specification for electronic cash register

AIR FORCE MIL-STD-1750 A VALID NOTICE 3-1994 十六位计算机指令集架构

MIL-ST~l 750A, dated 2 July 1980, has been reviewed and determined [o be valid for use in acquisition.

SIXTEEN-BIT COMPUTER INSTRUCTION SET ARCHITECTURE

ANSI/IEEE Std1296:1994 信息技术.微处理机系统.高性能同步32位总线:MULTIBUSⅡ

Information technology - Microprocessor Systems - High - performance synchronous 32-bit bus: MULTIBUS II

ANSI/IEEE Std896.1:1994 信息技术.微处理机系统.未来总线.逻辑协议规范

Information technology - Microprocessor systems - futurebus+- logical protocol specification

ISO/IEC 10857:1994 信息技术 微处理机系统 未来总线 逻辑协议规范

Specifies the logical layer for a set of signal lines that constitute a multiple segment bus architecture, and for the interfacing of modules connected to a bus segment. Intended to be used as a component within a profile to build systems with higher levels of compatibility.

Information technology - Microprocessor systems - Futurebus+ - Logical protocol specification

NAVY A-A-50622-1994 船只个人电脑及外围设备震荡抑止器

The General Services Administration has authorized the　use of this Commercial Item Description.

SURGE SUPPRESSOR FOR SHIPBOARD PERSONAL COMPUTERS AND PERIPHERAL EQUIPMENTS

ANSI/VITA 1-1994 VME64

Defines a framework for 8-, 16-, 32-, and 64-bit parallel bus computer architectures that can implement single and multiprocessor systems. Based on the VMEbus specification released by the VMEbus Manufacturers Group (now VITA) in August 1982, this bus includes the initial four basic subbuses: (1) data transfer bus, (2) priority interrupt bus, (3) arbitration bus, and (4) utility bus. Other architectures with other subbuses are possible within this VME framework.

VME64

DLA SMD-5962-94732-1994 小型计算机系统接口活跃终端固定电压调节器硅单片电路线型微电路

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.1.2 PIN. The PIN is as shown in

MICROCIRCUIT, LINEAR, VOLTAGE REGULATOR, FIXED, FOR SCSI ACTIVE TERMINATION, MONOLITHIC SILICON

ISO/IEC 11458:1993 信息技术.微处理机系统.VIC总线.板箱间电缆总线

The objectives are to provide a standard cable bus for the interconnection of multiple devices, both backplane bus systems, such as the IEC 821 VMEbus, and stand-alone apparatus; to specify the electrical characteristics of the cable bus; to specify the protocols that precisely define the interaction between devices connected to the VICbus; to specify the mechanisms necessary to construct fault-tolerant, multi-device systems; to provide the necessary definitions, terminology and background information to fully describe the VICbus protocols and other mechanisms.

Information technology; microprocessor systems; VICbus; inter-crate cable bus

DIN IEC 60796-1:1993 8位和16位数据传送微处理机系统总线(多接口总线 I).第1部分:功能描述用电器要求和定时特性

The document describes a microprocessor system bus for 8 bit and 16 bit data. It provides for the functional description, the electrical and timing specifications.#,,#

Microprocessor system bus I 8-bit and 16-bit data (MULTIBUS I); part 1: functional description with electrical and timing specifications (IEC 60796-1:1990); German version HD 593.1 S1:1992

DIN IEC 60796-2:1993 8位和16位数据传送微处理机系统总线(多接口总线 I).第2部分:带直接播塞的系统总线配置用机械安装和播脚布置

Microprocessor system bus I 8-bit and 16-bit data (MULTIBUS I); part 2: mechanical and pin descriptions for the system bus configuration, with edge connectors (direct) (IEC 60796-2:1990); German version HD 593.2 S1:1992