IEC TS 61945-2000
集成电路 生产线批准 工艺和失效分析方法
Integrated circuits - Manufacturing line approval - Methodology for technology and failure analysis
- 标准号
- IEC TS 61945-2000
- 发布日期
- 2000年03月
- 实施日期
- 废止日期
- 无
- 中国标准分类号
- L56
- 国际标准分类号
- 31.200
- 发布单位
- 国际电工委员会
- 被代替标准
- IEC 47A/523/CDV-1998
- 适用范围
- This technical specification gives the methodology for technology and failure analysis in manufacturing integrated circuits. Taking into account the level of complexity of techniques and means to be used, the present technical specification covers the classification of several levels of technology analysis that may be used for semiconductors and defines for each level: - the objective to be performed (or goal); - the points to be investigated; - the tools and techniques needed for currently available technologies to perform these objectives. Technology analysis is used to determine the way a component is built by observing it using adequate resolution, which increases progressively with the level of analysis. In addition, it allows detection of any fault potentially affecting the reliability of the devices under typical working conditions. It may be used to verify the conformance of a device to its manufacturing documents, but may also be used to determine the physical and chemical characteristics of the device under test. The points observed during the analysis can also serve as guidelines for an expert in a future quality audit of a manufacturing line. By using similar or case-specific means, the failure analysis leads to identifying the physical reasons of a failure found in a device during a test or during normal working conditions. Through a deep knowledge of the component and of its intrinsic failure mechanisms, the technology analysis can prepare for future failure analyses. This technical specification is considered as a suitable test methodology when referred to in an application document. Such documents shall indicate the specific conditions for its application.