L42 半导体三极管 标准查询与下载

ASTM F528-99(2005) 结型晶体管共射极直流增益测量的标准试验方法

The current gain of a transistor is basic to its operation and is its single most important parameter. Ionizing radiation, that is, gamma radiation due to a nuclear burst, will degrade the current gain due to lifetime damage in the bulk material. Degradation of gain will be greatest immediately following a burst of ionizing radiation and the gain will rapidly recover to a quasi steady-state value. Defect annealing may continue for weeks but usually the current gain recovery is small or negligible. This method provides a procedure that does not require special-purpose test equipment. This method is suitable for use for specification acceptance, service evaluation, or manufacturing control.1.1 This test method covers the measurement of common-emitter d-c current gain (forward, hFE, or inverted, hFEI) of bipolar transistors, for which the collector-emitter leakage current, ICEO, is less than 10% of the collector current, IC, at which the measurement is to be made, and for which the shunt leakage current in the base circuit is less than 10% of the base current required. 1.2 This test method is suitable for measurement of common-emitter d-c current gain at a single given value of test transistor collector current or over a given range of collector currents (for example, over the range of the transistor to be tested). 1.2.1 The nominal ranges of collector current over which the three test circuits are intended to be used are as follows: 1.2.1.1 Circuit 1, less than 100 [mu]A, 1.2.1.2 Circuit 2, from 100 [mu]A to 100 mA, and 1.2.1.3 Circuit 3, greater than 100 mA. 1.3 This test method incorporates tests to determine if the power dissipated in the transistor is low enough that the temperature of the junction is approximately the same as the ambient temperature. 1.4 The values stated in International System of Units (SI) are to be regarded as standard. No other units of measurement are included in this standard. 1.5 This standard does not purport to address the safety problems, if any, associated with its use. It is the responsibility of whoever uses this standard to consult and establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

Standard Test Method of Measurement of Common-Emitter D-C Current Gain of Junction Transistors

ASTM F528-99 结型晶体管共射极直流增益测量的标准试验方法

1.1 This test method covers the measurement of common-emitter d-c current gain (forward, hFE, or inverted, hFEI) of bipolar transistors, for which the collector-emitter leakage current, ICEO, is less than 10% of the collector current, IC, at which the measurement is to be made, and for which the shunt leakage current in the base circuit is less than 10% of the base current required. 1.2 This test method is suitable for measurement of common-emitter d-c current gain at a single given value of test transistor collector current or over a given range of collector currents (for example, over the range of the transistor to be tested). 1.2.1 The nominal ranges of collector current over which the three test circuits are intended to be used are as follows: 1.2.1.1 Circuit 1, less than 100 [mu]A, 1.2.1.2 Circuit 2, from 100 [mu]A to 100 mA, and 1.2.1.3 Circuit 3, greater than 100 mA. 1.3 This test method incorporates tests to determine if the power dissipated in the transistor is low enough that the temperature of the junction is approximately the same as the ambient temperature. 1.4 The values stated in International System of Units (SI) are to be regarded as standard. No other units of measurement are included in this standard. 1.5 This standard does not purport to address the safety problems, if any, associated with its use. It is the responsibility of whoever uses this standard to consult and establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

Standard Test Method of Measurement of Common-Emitter D-C Current Gain of Junction Transistors

ASTM F996-98 利用亚阈值安伏特性测定由于氧化空穴和界面态产生的电离辐射感应金属氧化物半导体场效应晶体管阈电压偏移分量的标准试验方法

1.1 This test method covers the use of the subthreshold charge separation technique for analysis of ionizing radiation degradation of a gate dielectric in a metal-oxide-semiconducter-field-effect transistor (MOSFET) and an isolation dielectic in a parasitic MOSFET. The subthreshold technique is used to separate the ionizing radiation-induced inversion voltage shift, [delta]VINV into voltage shifts due to oxide trapped charge, [delta]Vot and interface traps, [delta]Vit. This technique uses the pre- and post-irradiation drain to source current versus gate voltage characteristics in the MOSFET subthreshold region. 1.2 Procedures are given for measuring the MOSFET subthreshold current-voltage characteristics and for the calculation of results. 1.3 The application of this test method requires the MOSFET to have a substrate (body) contact. MOSFETs on silicon-on-insulator (SOI) technology must have body ties. 1.4 Both pre- and post-irradiation MOSFET subthreshold source or drain curves must follow an exponential dependence on gate voltage for a minimum of two decades of current. 1.5 This standard does not purport to address all of the safety problems, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

Standard Test Method for Separating an Ionizing Radiation-Induced MOSFET Threshold Voltage Shift Into Components Due to Oxide Trapped Holes and Interface States Using the Subthreshold Current-Voltage Characteristics

ASTM F996-98(2003) 利用亚阈值安伏特性测定由于氧化空穴和界面态产生的电离辐射感应金属氧化物半导体场效应晶体管阈电压偏移分量的标准试验方法

The electrical properties of gate and field oxides are altered by ionizing radiation. The time dependent and dose rate effects of the ionizing radiation can be determined by comparing pre- and post-irradiation voltage shifts, ΔVot andΔ Vit. This test method provides a means for evaluation of the ionizing radiation response of MOSFETs and isolation parasitic MOSFETs. The measured voltage shifts, ΔVot andΔ Vit, can provide a measure of the effectiveness of processing variations on the ionizing radiation response. This technique can be used to monitor the total-dose response of a process technology.1.1 This test method covers the use of the subthreshold charge separation technique for analysis of ionizing radiation degradation of a gate dielectric in a metal-oxide-semiconducter-field-effect transistor (MOSFET) and an isolation dielectic in a parasitic MOSFET. The subthreshold technique is used to separate the ionizing radiation-induced inversion voltage shift, V INV into voltage shifts due to oxide trapped charge, Vot and interface traps, Vit. This technique uses the pre- and post-irradiation drain to source current versus gate voltage characteristics in the MOSFET subthreshold region.1.2 Procedures are given for measuring the MOSFET subthreshold current-voltage characteristics and for the calculation of results.1.3 The application of this test method requires the MOSFET to have a substrate (body) contact. 1.4 Both pre- and post-irradiation MOSFET subthreshold source or drain curves must follow an exponential dependence on gate voltage for a minimum of two decades of current.1.5 The values given in SI units are to be regarded as standard. No other units of measurement are included in this test method.1.6 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

Standard Test Method for Separating an Ionizing Radiation-Induced MOSFET Threshold Voltage Shift Into Components Due to Oxide Trapped Holes and Interface States Using the Subthreshold Current-Voltage Characteristics

ASTM F676-97 测量不饱和的晶体管逻辑电路吸收电流的方法

1.1 This test method covers the measurement of the unsaturated sink current of transistor-transistor logic (TTL) devices under specified conditions. 1.2 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

Standard Test Method for Measuring Unsaturated TTL Sink Current

DIN EN 120003:1996 空白详细规范:光电晶体管、光电复合晶体管、光电晶体管阵列

Blank detail specification - Phototransistors, photodarlington transistors, phototransistor arrays; German version EN 120003:1992

ASTM E1855-96 作为中子光谱传感器和位移破坏性监测器的2N2222A硅双极晶体管使用的标准试验方法

1.1 This test method covers how 2N2222A silicon bipolar transistors can be used either as dosimetry sensors in the determination of neutron energy spectra, or as silicon 1-MeV equivalent displacement damage fluence monitors.

Standard Test Method for Use of 2N2222A Silicon Bipolar Transistors as Neutron Spectrum Sensors and Displacement Damage Monitors

ASTM F616M-96 测量MOSFET(金属氧化物半导体场效应晶体管)排漏电流的标准测试方法(米制单位)

1.1 This test method covers the measurement of MOSFET (Note 1) drain leakage current. Note 1-MOS is an acronym for metal-oxide semiconductor; FET is an acronym for field-effect transistor. 1.2 This test method is applicable to all enhancement-mode and depletion-mode MOSFETs. This test method specifies positive voltage and current, conventions specifically applicable to n-channel MOSFETs. The substitution of negative voltage and negative current makes the method directly applicable to p-channel MOSFETs. 1.3 The d-c test method is applicable for the range of drain voltages greater than 0 V but less than the drain breakdown voltage. 1.4 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

Standard Test Method for Measuring MOSFET Drain Leakage Current (Metric)

ASTM F616M-96(2003) 测量MOSFET(金属氧化物半导体场效应晶体管)排漏电流的标准测试方法(米制单位)

1.1 This test method covers the measurement of MOSFET (Note 1) drain leakage current.Note 18212;MOS is an acronym for metal-oxide semiconductor; FET is an acronym for field-effect transistor.1.2 This test method is applicable to all enhancement-mode and depletion-mode MOSFETs. This test method specifies positive voltage and current, conventions specifically applicable to n-channel MOSFETs. The substitution of negative voltage and negative current makes the method directly applicable to p-channel MOSFETs.1.3 This d-c test method is applicable for the range of drain voltages greater than 0 V but less than the drain breakdown voltage.1.4 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

Standard Test Method for Measuring MOSFET Drain Leakage Current (Metric)

SJ 50033/33-1994 半导体分立器件.F1121型NPN硅功率达林顿晶体管详细规范

Semiconductor discrete device.Detail specification for type FH 121 NPN silicon power Darlington transistor

SJ 50033/31-1994 半导体分立器件.FH101型NPN硅功率达林顿晶体管详细规范

Semiconductor discrete device.Detail specification for type FH 101 NPN silicon power Darlington transistor

SJ 50033/34-1994 半导体分立器件.F1129型NPN硅功率达林顿晶体管详细规范

Semiconductor discrete device.Detail specification for type FH 129 NPN silicon power Darlington transistor

IEC 60747-7/AMD2:1994 半导体分立器件和集成电路.第7部分:双极性晶体管.补充件2

Semiconductor discrete devices and integrated circuits - Part 7: Bipolar transistors; Amendment 2

BS QC 750113:1994 电子元器件质量评估协调体系规范.空白详细规范:电流大于100A的环境温度额定和外壳温度限定反向闭锁三级半导体闸流晶体管

Lists the ratings, characteristics and inspection requirements which shall be included as mandatory requirements in accordance with BS QC 750100.

Specification for harmonized system of quality assessment for electronic components - Blank detail specification: reverse blocking triode thyristors, ambient and case-rated, for currents greater than 100 A

JIS C 7032:1993 晶体管用通用规则

この規格は，電子機器に用いるバィポーラトランジスタ及び電界効果トランジスタ(以下,両者を総称してトランジスタという。)の一般的共通事項について規定する。

General rules for transistors

JIS C 7030:1993 晶体管的测量方法

この規格は，電子装置に用いるバィポーラトランジスタ及び電界効果トランジスタ(以下,両者を区別しないときには，単にトランジスタという。)の電気的性能の測定方法について規定する。

Measuring methods for transistors

STAS 5787-1992 硫化橡胶．密度的测定

Prezentul standard stabile?te dou? metode de ?ncercare destinate determin?rii densit??ii cauciucului vulcanizat compact. Prezentul standard nu con?ine determinarea densit??ii relative a cauciucului, care este raportul dintre masa unul volum dat de cauciuc

Compact vulcanized rubber. Determination of density

IEC 60747-7/AMD1:1991 半导体分立器件和集成电路.第7部分:双极晶体管.修改件1

Semiconductor discrete devices and integrated circuits; part 7: bipolar transistors; amendment 1

SJ 3254-1989 中小功率晶体三极管计量专用样管筛选方法

本标准适用于集电极最大允许耗散功率(Pcm)为1w以下的中小功率晶体三初管。

Methods for screen of samples of medium-low power transistors for measurements

IEC 60747-7-1:1989 半导体器件 分立器件 第7部分:双极晶体管 第1节:低频和高频放大环境额定双极晶体管空白详细规范

The blank detail specification described includes mechanical description, categories of assessed quality, limiting values, electrical characteristics, marking, ordering information, test conditions and inspection requirements. To be used with IEC Publica

Semiconductor devices; discrete devices; part 7: bipolar transistors; section one: blank detail specification for ambient-rated bipolar transistors for low and high-frequency amplification